The present disclosure relates to a high voltage pumping device, and, more particularly, to a high voltage pumping device which enables a semiconductor memory device to operate normally, by preventing the level of a high voltage used in the semiconductor memory device from being dropped excessively below an appropriate range due to an excessive use of the high voltage when the semiconductor memory device enters an active mode, and thus, maintaining the level of the high voltage within the appropriate range.
Generally, DRAM is a random access memory capable of writing or reading data in or from a memory cell consisting of one transistor and one capacitor. Such a DRAM mainly uses an NMOS transistor for the transistor constituting each memory cell of the DRAM. For this reason, the DRAM must include a voltage pumping device which generates a drive voltage higher than the sum of an external supply voltage Vdd and a threshold voltage Vt by “ΔV” (namely, “Vdd+Vt+ΔV”), for driving word lines, taking into consideration a voltage loss caused by the threshold voltage Vt.
This will be described in more detail. In order to turn on the NMOS transistor used in each DRAM memory cell of the DRAM, it is necessary to apply, to the gate of the NMOS transistor, a voltage higher than a source voltage by a threshold voltage Vt or more. However, since the maximum level of a voltage applicable to the DRAM corresponds to the level of the external supply voltage Vdd, it is necessary to apply a voltage boosted to a level of “Vdd+Vt” or more to the gate of the NMOS transistor, in order to enable the DRAM to read a voltage having a level corresponding to Vdd from a cell or a bit line or to write the voltage in the cell or bit line. Therefore, in order to drive word lines of the DRAM device, a voltage pumping device is used which generates a high voltage Vpp as the boosted voltage.
In conventional cases, however, such a voltage pumping device has a problem in that the level of a high voltage pumped by the voltage pumping device is typically dropped below an appropriate range due to excessive use of the high voltage when the semiconductor memory device, to which the voltage pumping device is applied, enters an active mode, thereby causing the semiconductor memory device to operate erroneously. This problem will be described in detail hereinafter with reference to FIGS. 1 to 3. For reference, “active mode” means a mode in which a word line is activated for a data read or write operation of an associated cell, that is, a mode executed during a period until a precharge operation is begun after activation of the word line according to enabling of a row active signal. The row active signal is a control signal used to activate the word line when the active mode is begun. Also, a precharge signal is used which is activated when a precharge mode is begun.
Referring to FIG. 1, a conventional high voltage pumping device is illustrated. The conventional high voltage pumping device includes a high voltage detector 110 which detects the level of a high voltage VPP fed back thereto, and outputs a pumping enable signal ppea in response to the detected level of the high voltage VPP. The pumping enable signal ppea is enabled when the high voltage VPP is lower than a predetermined reference voltage.
The pumping enable signal ppea is input to a pumping control signal generator 120 which also receives a row active signal ractbp and a precharge signal rpcgbp. Based on the received signals, the pumping control signal generator 120 generates a pumping control signal vppact for controlling a high voltage pumping operation. This will be described in detail. First, the row active signal ractbp is latched by a latching unit 121, as shown in FIG. 2. As shown in FIG. 3, the latching unit 121 then outputs a control signal rastb, which is maintained at a low level (namely, in an active state) from the point of time when the row active signal ractbp is activated to the point of time when the precharge signal rpcgbp is activated, namely, a period for which the active mode is executed. The control signal rastb is delayed for a predetermined period by a delaying unit 122. In particular, the delaying unit 122 delays the active state of the control signal rastb. As a result, a control signal vpa having a waveform as shown in FIG. 3 is output from an inverter IV11. The control signal vpa is applied to a logic unit 123 which, in turn, ANDs the control signal vpa with the pumping enable signal ppea, and outputs a pumping control signal vppact. The pumping control signal vppact is activated when the pumping enable signal ppea is enabled under the condition in which the control signal vpa is enabled.
The pumping control signal vppact is applied to an oscillator 130, as shown in FIG. 1. In response to the pumping control signal vppact, the oscillator 130 generates an oscillation signal osc which is, in turn, applied to a pumping unit 140. The pumping unit 140 pumps the high voltage VPP to a predetermined level in response to the oscillation signal osc.
The above-mentioned operation of the conventional high voltage pumping device will be summarized hereinafter. When the high voltage VPP fed back to the high voltage pumping device is lower than a predetermined reference voltage, the pumping enable signal ppea output from the high voltage detector 110 is enabled. When the pumping control signal vppact output from the pumping control signal generator 120 is enabled in the active mode under the condition in which the pumping enable signal ppea has been enabled, the oscillator 130 outputs the oscillation signal osc. In response to the oscillation signal osc, the pumping unit 140 performs a pumping operation for the high voltage VPP. Thus, the high voltage VPP output from the high voltage pumping device can be maintained at a predetermined level.
However, the above-mentioned conventional high voltage pumping device has a problem in that the level of the high voltage is dropped to a level lower than an appropriate range due to excessive use of the high voltage when the active mode is begun. That is, when the semiconductor memory device which uses the conventional high voltage pumping device enters the active mode in accordance with activation of the row active signal ractbp, the high voltage VPP is not only used to drive word lines, but also used for other purposes, for example, as a bit line isolation signal BISH or BISL. As a result, the level of the high voltage VPP is dropped. In order to compensate for the dropped high voltage VPP, it is necessary to perform a pumping operation for the high voltage VPP. However, since the pumping operation is carried out based on sensing of the dropped high voltage VPP, a certain time is inevitably taken prior to the pumping operation, due to the sensing operation. For this reason, there is a problem in that the level of the high voltage VPP is excessively dropped below an appropriate range when the active mode is begun because the dropped high voltage VPP cannot be immediately compensated for. The excessive drop of the high voltage VPP adversely affects operation of sense amplifiers and activation of word lines, thereby causing the semiconductor memory device to operate erroneously.
There is a need for a high voltage pumping device which enables a semiconductor memory device to operate normally, by preventing the level of a high voltage used in the semiconductor memory device from being excessively dropped below an appropriate range due to an excessive use of the high voltage when the semiconductor memory device enters an active mode, and thus, maintaining the level of the high voltage within the appropriate range.